Automatic External Defibrillator

Skills Acquired/Applied
FPGA, C, VHDL, Xilinx EDK Tools, Custom IP, cardiac physiology, VGA displays, defibrillation algorithms, signal processing

Summary
An Automatic External Defibrillator (AED) is a portable electronic device that diagnoses and treats cardiac arrest by reestablishing an effective heart rhythm. This treatment is called defibrillation, which applied an electric shock to the entire heart muscle, uniformly clearing the electrical activity of the heart, hopefully allowing it to resynchronize. For our class project that was part of the Hybrid Embedded Systems Design course, Chris, Maria and I decided to build a fully reconfigurable AED device using the Xilinx Virtex-II Pro FPGA development board. The idea stemmed from the fact that field recordings of heart rhythms vary immensely, with numerous factors such as skin conductivity and electrode placement affecting waveform morphology. Therefore, a multitude of algorithms to identify fibrillation conditions exist, and current AED devices use a voting scheme to decide if the heart is fibrillating. We therefore, felt the need for a reconfigurable platform for this application, where newer and more robust algorithms can be field-programmed, and firmware can be updated without system modifications. Moreover, since time is a crucial factor in the delivery of the defibrillating pulse, complex algorithms can be implemented in hardware (hence an FPGA). This would expedite runtime by many orders of magnitude.allow much faster execution at runtime.

Project Details
This project consisted of three major sections - cardiac rhythm input and pre-processing, algorithm-based arrhythmia characterization, and graphical (VGA) decision output. We used one of the two PowerPC cores available on the Xilinx Virtex-II Pro FPGA development board, with 512MB of external DDR RAM to store input data. The display buffer for VGA output was implemented using BRAM within the FPGA fabric.

Realistically speaking, recording of cardiac rhythm using surface electrodes was not possible for the same reasons that make AED design so complex. For a start, electrode placement would change with every trial, making waveform morphology characterization difficult. Secondly, it would be difficult to recruit subjects who were in fibrillation to sign up for firmware testing. Therefore, we used dual-channel excerpts from the MIT-BIH database to obtain arrhythmia waveforms. The MIT-BIH Arrhythmia Database contains 48 half-hour excerpts of two-channel ambulatory ECG recordings, obtained from 47 subjects studied by the BIH Arrhythmia Laboratory between 1975 and 1979. Pre-processing of the cardiac signal involved full-wave rectification, followed by low-pass filtering using a sliding window averaging technique. Signal data was input to the system over a serial link at 57600 baud.

The choice of algorithm to characterize Ventricular Fibrillation (VF) is the crux of an AED system. Algorithm complexity is restricted by processing and runtime costs, which encourages the use of custom ASICs or FPGAs that allow algorithm implementation in hardware. We selected a complex measure algorithm that has high sensitivity and selectivity for the selected MIT-BIH database (Amann A et al., 2005). The algorithm processed cardiac waveform data over an 8 second interval, and made multiple calculations to identify normal QRS complexes, the absence of which along with real-time dynamic heart rate calculation allowed VF identification.

Outputs for the system were in the form of graphical output for cardiac waveform display, as well as the decision to apply therapeutic defibrillation pulse based on a voting scheme. A VGA controller was implemented using Xilinx IP that adds a second bus master on the PLB bus and writes information from the display buffer to the VGA display port.

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